Analog IC Layout Engineer

About the role

NXP Semiconductors is looking for an Analog IC Layout Engineer to join the Central Layout Group supporting the Power & Energy Business Line, focusing on Automotive Power Solutions. The role involves developing analog and mixed‑signal IC layouts from schematic through tape‑out and collaborating with cross‑functional teams worldwide.

Key responsibilities

• Develop analog and mixed‑signal layout blocks, support floorplanning and physical implementation, and optimize for performance, matching, reliability and manufacturability.
• Execute DRC, LVS, ERC and other physical verification tasks, perform parasitic extraction, post‑layout analysis and participate in design reviews and sign‑off.
• Collaborate with analog design, verification, package, test and product engineering teams, troubleshoot issues and contribute to methodology improvements.

Required profile

• Bachelor or Master degree in Electrical Engineering, Electronics, Physics or Microelectronics.
• Experience with Cadence Virtuoso layout environment and knowledge of analog IC layout methodologies.
• Strong analytical and problem‑solving abilities, ability to work in multicultural, international teams and fluent English.

Required skills

• Cadence Virtuoso
• DRC/LVS verification concepts
• Linux operating environment
• Calibre or PVS verification tools (preferred)
• CMOS, BCD or high‑voltage technology knowledge (preferred)
• Scripting languages such as SKILL, Python, TCL or Shell (preferred)